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Mentor introduces Tessent Safety Ecosystem

Auto News - Published on Thu, 14 Nov 2019

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Siemens Mentor introduced the new Tessent software Safety ecosystem a comprehensive portfolio of best-in-class automotive IC test solutions from Mentor with links to its industry leading partners. The program helps IC design teams meet the increasingly stringent functional safety requirements of the global automotive industry. The Tessent Safety ecosystem provides a robust alternative to competing programs, which are based on closed, monolithic, single-source models. Mentor’s open ecosystem approach to IC test functional safety assurance allows chipmakers to combine Mentor’s industry-leading IC test technologies with other best-in-class solutions, enabling more complete, higher performing end-solutions.

Planned for rapid expansion via partnerships with Mentor’s deep roster of leading partners, the Tessent Safety ecosystem include

Industry-leading built-in self-test technologies from Mentor, including the new Tessent LBIST with Observation Scan Technology solution designed to dramatically reduce run times for in-system monitoring of digital logic components in automotive ICs. Engineered to help customers meet stringent automotive functional safety requirements, the new Tessent LBIST-OST solution delivers up to a 10x reduction of in-system test time compared to traditional logic BIST technologies.
The Tessent™ MemoryBIST, which features a comprehensive automation flow that provides design rule checking, test planning, integration, and verification at either the RTL or gate level. Because Tessent MemoryBIST features a hierarchical architecture, BIST and self-repair capabilities can be added to individual cores as well as at the top level.

The Tessent™ MissionMode product, which provides a combination of automation and on-chip IP for enabling semiconductor chips throughout an automotive electronics system to be tested and diagnosed at any point during a vehicle’s functional operation.

The Tessent™ DefectSim transistor-level defect simulator for analog, mixed-signal and non-scan digital circuits. Ideal for both high-volume and high-reliability ICs, Tessent DefectSim measures defect coverage and tolerance.

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Posted By : Arun Huidrom on Thu, 14 Nov 2019
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